A chaotically injected timing technique for ring-based oscillators

Abstract

This work proposes a chaotically injected timing technique (CITT) for ring-based oscillators. The quality of clock signal affects the normal motion of the entire circuit. In many oscillators and clock generators show the performance comparison through jitters and phase noise. The injection-locked ring-based oscillators have advantages of jitters, phase noise and area cost. However, there is a contingent effect, injected spur. By adopting the CITT, the injected phase pattern can be randomized and break the periodicity of injected signal to solve the high injected spur effect. The CITT can reduce the level of phase noise by 29 dB compared to the free-run oscillator. The experiment chip of the proposed CITT is implemented by 90 nm CMOS process. The measured output frequency is 5 GHz at supply voltage of 1 V. The level of phase noise is -99 dBc at frequency offset of 1 MHz under injected frequency of 1 GHz.