Bandgap failure study due to parasitic bipolar substrate coupling in Smart Power mixed ICs

Abstract

In order to merge low power and high voltage devices on the same chip at competitive cost, Smart Power integrated circuits (ICs) are extensively used. The presence of low power and high voltage devices in Smart Power ICs cause parasitic substrate interaction between switched power stages and sensitive analog blocks. Nowadays this is the major cause of failure of Smart Power ICs inducing costly circuit redesign. Modern CAD tools cannot accurately simulate this type of interaction expressed as an injection of minority carriers in the substrate and their propagation in the substrate. In order to create a link between circuit design, modelling and implementation in innovative CAD tools there is a need to validate these models by measuring the high voltage perturbations that activate parasitic structures. This paper presents a study of bandgap failure issues due to the substrate coupling induced by high power parts of the circuit which can activate parasitic bipolar structures inside the substrate of Smart Power ICs.