{"title":"Design trade-offs in high performance packages","authors":"S. Kadakia, A. Agrawal","doi":"10.1109/ECTC.1996.517454","DOIUrl":null,"url":null,"abstract":"The objective of this paper is to focus on design considerations and on design methodology for high performance packages. Discussion will be restricted to Single Chip Packages only. Wirebond and Flip chip packages in Pin Grid and Ball Grid I/Os are described here. As shown here design considerations are primarily driven by customer input followed by electrical modeling and process modeling to guarantee performance and cost. The electrical performance of the package is analyzed by evaluating the parasitic parameters.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 Proceedings 46th Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1996.517454","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The objective of this paper is to focus on design considerations and on design methodology for high performance packages. Discussion will be restricted to Single Chip Packages only. Wirebond and Flip chip packages in Pin Grid and Ball Grid I/Os are described here. As shown here design considerations are primarily driven by customer input followed by electrical modeling and process modeling to guarantee performance and cost. The electrical performance of the package is analyzed by evaluating the parasitic parameters.
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