GaAs MESFET digital integrated circuits fabricated with low temperature buffer technology

M. Delaney, C. Chou, L. Larson, J. Jensen, D. Deakin, A. Brown, W. Hooper, M. Thompson, L. McCray, S. Rosenbaum
{"title":"GaAs MESFET digital integrated circuits fabricated with low temperature buffer technology","authors":"M. Delaney, C. Chou, L. Larson, J. Jensen, D. Deakin, A. Brown, W. Hooper, M. Thompson, L. McCray, S. Rosenbaum","doi":"10.1109/CICC.1989.56782","DOIUrl":null,"url":null,"abstract":"High-performance digital integrated circuits have been fabricated with low-temperature buffer GaAs MESFET technology. The materials structure eliminates side-gating and light sensitivity, and improves FET performance. Individual transistors with a 0.2-μm gate length have a transconductance gm of 600 mS/mm and an extrapolated cutoff frequency fT of 80 GHz. Static SCFL frequency dividers fabricated in this technology exhibit a maximum clock rate of 22 GHz","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56782","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

High-performance digital integrated circuits have been fabricated with low-temperature buffer GaAs MESFET technology. The materials structure eliminates side-gating and light sensitivity, and improves FET performance. Individual transistors with a 0.2-μm gate length have a transconductance gm of 600 mS/mm and an extrapolated cutoff frequency fT of 80 GHz. Static SCFL frequency dividers fabricated in this technology exhibit a maximum clock rate of 22 GHz
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
采用低温缓冲技术制备GaAs MESFET数字集成电路
利用低温缓冲GaAs MESFET技术制备了高性能数字集成电路。该材料结构消除了侧门控和光敏感性,提高了FET性能。栅极长度为0.2 μm的单个晶体管的跨导gm为600 mS/mm,外推截止频率fT为80 GHz。采用该技术制造的静态SCFL分频器最大时钟速率为22 GHz
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A 1.4 ns/64 kb RAM with 85 ps/3680 logic gate array A gate matrix deformation and three-dimensional maze routing for dense MOS module generation A submicron CMOS triple level metal technology for ASIC applications Hot carrier effects on CMOS circuit performance The QML-an approach for qualifying ASICs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1