Full Wafer Stress Metrology for Dielectric Film Characterization: Use Case

V. Brouzet, V. Gredy, F. Chenevas-Paule, K. Le-Chao, D. Guiheux, A. Laurent, V. Coutellier, D. Le-Cunff
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引用次数: 9

Abstract

With the introduction of new materials in Back-End of Lines to overcome the development of new options in mature technologies, controlling the local stress and establishing its potential impact on yield becomes more and more critical. In the same way, for high volume production control, it is also important to verify that process equipments of the same kind actually deliver the same materials characteristics as well as to identify which hardware parameters of the process equipment itself can influence the resulting film properties. In this context, this paper will demonstrate how metrology techniques can provide relevant and rapid information on the stress characteristic at the deposition process step itself. This will be illustrated by exploring the impact of wafer centering in a Chemical Vapor Deposition (CVD) dielectric deposition chamber for the case of final Nitride passivation layer both on blanket and product wafers.
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介质薄膜特性的全晶圆应力测量:用例
随着生产线后端新材料的引入,克服了成熟技术中新选项的发展,控制局部应力并确定其对良率的潜在影响变得越来越重要。同样,对于大批量生产控制,验证相同类型的工艺设备实际上提供相同的材料特性以及确定工艺设备本身的哪些硬件参数会影响所得到的薄膜性能也很重要。在这种情况下,本文将展示计量技术如何在沉积过程步骤本身提供有关应力特征的相关和快速信息。这将通过探讨在化学气相沉积(CVD)介质沉积室中晶圆对最终氮化物钝化层在毯层和产品晶圆上的影响来说明。
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