{"title":"Interconnected capacitors for effective power delivery noise suppression across domains","authors":"Sameer Shekhar, A. Jain","doi":"10.1109/EPEPS.2015.7347118","DOIUrl":null,"url":null,"abstract":"Optimal power delivery network design relies on decoupling capacitors that consume significant package and board real estate, which is becoming scarce due to shrinking chip sizes and overall system form factors. This paper addresses noise reduction via capacitor interconnection between different voltage domains to leverage decoupling capacitors across domains. Novel structures that integrate decoupling and interconnection capacitor are then proposed. The complete solution delivers more than 40% noise reduction per unit capacitor area. Simulation results are provided for illustration.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2015.7347118","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Optimal power delivery network design relies on decoupling capacitors that consume significant package and board real estate, which is becoming scarce due to shrinking chip sizes and overall system form factors. This paper addresses noise reduction via capacitor interconnection between different voltage domains to leverage decoupling capacitors across domains. Novel structures that integrate decoupling and interconnection capacitor are then proposed. The complete solution delivers more than 40% noise reduction per unit capacitor area. Simulation results are provided for illustration.