Unique ESD failure mechanism of high voltage LDMOS transistors for very fast transients

A. Goyal, J. Whitfield, Changsoo Hong, C. Gill, C. Rouying Zhan, V. Kushner, A. Gendron, S. Contractor
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引用次数: 7

Abstract

We have identified and explained a unique ESD breakdown mechanism of high voltage 80V LDMOS structures for very fast CDM transients. The device was protected against observed damage by placing a zener across the gate and source which prevents the observed voltage build up at the gate of the LDMOS.
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高电压LDMOS晶体管快速瞬态的独特ESD失效机制
我们已经确定并解释了高压80V LDMOS结构的独特ESD击穿机制,用于非常快速的CDM瞬态。通过在栅极和源上放置齐纳,可以防止在LDMOS栅极处观察到的电压积聚,从而保护该器件免受观察到的损坏。
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