{"title":"Multifunction content addressable memory for parallel speech understanding","authors":"R. Cagle, R. Holl, R. Demara","doi":"10.1109/SOUTHC.1994.498125","DOIUrl":null,"url":null,"abstract":"Content Addressable Memories (CAMs) allow considerably finer-grained parallelism than conventional shared or distributed memory multi-processors. This fine-grained \"Processor-In-Memory\" concept can be employed to a large degree during Semantic Network processing in support of Artificial Intelligence (AI) with specific applications in speech and natural language processing. A special-purpose CAM configuration is presented based on requirements for a nominally-sized 64 K node semantic network with 8 bit-markers and 32 relationship types. Analysis for a target application shows that the extensive use of parallel Marker-Propagation and Set Theoretic Operations yields approximately 30-fold speedup over systems with standard Random Access Memories.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Record Southcon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOUTHC.1994.498125","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Content Addressable Memories (CAMs) allow considerably finer-grained parallelism than conventional shared or distributed memory multi-processors. This fine-grained "Processor-In-Memory" concept can be employed to a large degree during Semantic Network processing in support of Artificial Intelligence (AI) with specific applications in speech and natural language processing. A special-purpose CAM configuration is presented based on requirements for a nominally-sized 64 K node semantic network with 8 bit-markers and 32 relationship types. Analysis for a target application shows that the extensive use of parallel Marker-Propagation and Set Theoretic Operations yields approximately 30-fold speedup over systems with standard Random Access Memories.