{"title":"Design and test strategy for differential cascode voltage switch circuits","authors":"D.M. Wu, J.W. Davis, N. Thoma","doi":"10.1109/ASIC.1990.186156","DOIUrl":null,"url":null,"abstract":"A test methodology for the differential cascode voltage switch (DCVS) is described. The design methodology of DCVS makes it more testable compared to other technologies. In testing DCVS, a precharge state always precedes a test pattern or a functional pattern. This test methodology permits detection of delay faults and stuck-open faults. The good circuit outputs of a logic tree are orthogonal. A high percentage of defects can be detected through the XOR gate designed for testing nonorthogonal faults.<<ETX>>","PeriodicalId":126693,"journal":{"name":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Third Annual IEEE Proceedings on ASIC Seminar and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1990.186156","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A test methodology for the differential cascode voltage switch (DCVS) is described. The design methodology of DCVS makes it more testable compared to other technologies. In testing DCVS, a precharge state always precedes a test pattern or a functional pattern. This test methodology permits detection of delay faults and stuck-open faults. The good circuit outputs of a logic tree are orthogonal. A high percentage of defects can be detected through the XOR gate designed for testing nonorthogonal faults.<>
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