JFET-input, high speed comparator standard cell designed on a new series of analog arrays

M. Metcalf
{"title":"JFET-input, high speed comparator standard cell designed on a new series of analog arrays","authors":"M. Metcalf","doi":"10.1109/BIPOL.1988.51050","DOIUrl":null,"url":null,"abstract":"A monolithic JFET input comparator with performance that far exceeds any prior art has been designed on a semicustom IC. The use of the analog array provided benefits in design effort, manufacturing time and layout versatility without sacrificing excellence performance.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1988.51050","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

A monolithic JFET input comparator with performance that far exceeds any prior art has been designed on a semicustom IC. The use of the analog array provided benefits in design effort, manufacturing time and layout versatility without sacrificing excellence performance.<>
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
jfet输入,高速比较器标准单元设计在一系列新的模拟阵列上
在半定制集成电路上设计了一种性能远远超过现有技术的单片JFET输入比较器。使用模拟阵列在设计工作,制造时间和布局通用性方面提供了好处,而不会牺牲卓越的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
The best-case power-delay products for polysilicon-contacted bipolar-transistor gates. A theoretical study The effect of emitter sidewall isolation on the emitter junction in a double layer polysilicon bipolar process Delay analysis for BiCMOS drivers Comparing techniques for fabrication polysilicon contacted emitter bipolar transistors Thin base formation by double diffused polysilicon technology
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1