{"title":"A 100–145 GHz area-efficient power amplifier in a 130 nm SiGe technology","authors":"M. Bao, Z. He, H. Zirath","doi":"10.23919/eumic.2017.8230713","DOIUrl":null,"url":null,"abstract":"A 6-stage, 8-way combining power amplifier (PA) in a 130 nm SiGe BiCMOS technology is designed and measured. This PA has an output power of 12.5–15.5 dBm in a frequency range from 100 GHz to 145 GHz, when the input power is about 2 dBm. The small signal gain is 19 dB and the maximum DC power consumption is 480 mW with a supply voltage of 1.87 V. The peak power added efficiency (PAE) is 6.4% in D-band. T-junctions are utilized to combine and divide millimeter-wave power. To reduce the PA's loss and chip area, neither a Wilkinson power combiner/divider nor a balun is applied. The chip size is 0.53 mm2 (0.26 mm2 without pads).","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/eumic.2017.8230713","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
A 6-stage, 8-way combining power amplifier (PA) in a 130 nm SiGe BiCMOS technology is designed and measured. This PA has an output power of 12.5–15.5 dBm in a frequency range from 100 GHz to 145 GHz, when the input power is about 2 dBm. The small signal gain is 19 dB and the maximum DC power consumption is 480 mW with a supply voltage of 1.87 V. The peak power added efficiency (PAE) is 6.4% in D-band. T-junctions are utilized to combine and divide millimeter-wave power. To reduce the PA's loss and chip area, neither a Wilkinson power combiner/divider nor a balun is applied. The chip size is 0.53 mm2 (0.26 mm2 without pads).
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