Integration of polycide/metal capacitors in advanced device fabrication

A. Yin, J. White, A. Karroy, Chun Hu
{"title":"Integration of polycide/metal capacitors in advanced device fabrication","authors":"A. Yin, J. White, A. Karroy, Chun Hu","doi":"10.1109/ICSICT.1998.785821","DOIUrl":null,"url":null,"abstract":"Polycide/metal capacitors with high unit area capacitance and high linearity are successfully integrated into submicron CMOS device fabrication. The capacitor implementation is modular and low cost: the capacitor dielectric is deposited at low temperature and only one additional mask is needed for patterning the capacitor top plate. High voltage-capacitance linearity is obtained for the TEOS oxide capacitors of the capacitance density at 1 fF/spl mu/m/sup 2/, with the linear voltage coefficient of capacitance LVCC <5 ppm/V and the quadratic voltage coefficient of capacitance QVCC<2 ppm/V/sup 2/. For the nitride capacitors, 1.5 fF//spl mu/m/sup 2/ unit area capacitance is obtained with the LVCC <70 ppm/V and the QVCC <20 ppm/V/sup 2/.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSICT.1998.785821","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

Polycide/metal capacitors with high unit area capacitance and high linearity are successfully integrated into submicron CMOS device fabrication. The capacitor implementation is modular and low cost: the capacitor dielectric is deposited at low temperature and only one additional mask is needed for patterning the capacitor top plate. High voltage-capacitance linearity is obtained for the TEOS oxide capacitors of the capacitance density at 1 fF/spl mu/m/sup 2/, with the linear voltage coefficient of capacitance LVCC <5 ppm/V and the quadratic voltage coefficient of capacitance QVCC<2 ppm/V/sup 2/. For the nitride capacitors, 1.5 fF//spl mu/m/sup 2/ unit area capacitance is obtained with the LVCC <70 ppm/V and the QVCC <20 ppm/V/sup 2/.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
多晶硅/金属电容器在先进器件制造中的集成
具有高单位面积电容和高线性度的多晶硅/金属电容器成功集成到亚微米CMOS器件制造中。电容器的实现是模块化和低成本的:电容器电介质在低温下沉积,并且只需要一个额外的掩模来对电容器顶板进行图案化。电容密度为1 fF/spl mu/m/sup 2/时的TEOS氧化物电容器获得了较高的电压-电容线性度,电容线性电压系数LVCC <5 ppm/V,二次电压系数QVCC<2 ppm/V/sup 2/。对于氮化电容器,在LVCC <70 ppm/V和QVCC <20 ppm/V/sup /时,获得1.5 fF//spl mu/m/sup / 2/单位面积电容。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics Nonlinear modeling of 4 W 12 mm multi-cell microwave power GaAs MESFET Thermally excited micromechanical vacuum resonator Electrochemical etching used on UHV/CVD epitaxial thin films The reduction of base resistance of SiGe/Si HBT via ion implantation and side-wall oxide self-aligned technique
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1