A low power highly linear 2.4 GHz CMOS receiver front-end using current amplifier

I. Kwon, Kwyro Lee
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引用次数: 5

Abstract

A low power 2.4 GHz CMOS receiver front end using highly linear mixer based on current amplification and mixing is reported. In the proposed mixer, linearity is greatly improved by using a current mirror amplifier and transconductance linearization using multiple gated transistors. Single IF direct conversion receiver (DCR) architecture is used to achieve higher level of integration and to relax the problem of DCR. The fully integrated receiver front end is fabricated in 0.18 /spl mu/m CMOS technology and IIP3 of -9 dBm with a gain of 32 dB and noise figure of 6.5 dB are obtained at 8.8 mW power consumption.
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采用电流放大器的低功耗高线性2.4 GHz CMOS接收器前端
报道了一种基于电流放大和混频的高线性混频器的低功耗2.4 GHz CMOS接收机前端。在所提出的混频器中,通过使用电流镜像放大器和使用多门控晶体管的跨导线性化,线性度大大提高。采用单中频直接转换接收机(DCR)结构实现更高的集成度,缓解了DCR问题。接收机前端采用0.18 /spl mu/m CMOS工艺,在8.8 mW功耗下获得了-9 dBm的IIP3,增益为32 dB,噪声系数为6.5 dB。
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