G. Ilicali, W. Weber, W. Rosner, L. Dreeskornfeld, J. Hartwich, J. Kretz, T. Lutz, J. Mazellier, M. Stadele, M. Specht, J. R. Luyken, E. Landgraf, F. Hofmann, L. Risch, R. Kasmaier, W. Hansch
{"title":"Planar double gate transistors with asymmetric independent gates","authors":"G. Ilicali, W. Weber, W. Rosner, L. Dreeskornfeld, J. Hartwich, J. Kretz, T. Lutz, J. Mazellier, M. Stadele, M. Specht, J. R. Luyken, E. Landgraf, F. Hofmann, L. Risch, R. Kasmaier, W. Hansch","doi":"10.1109/SOI.2005.1563562","DOIUrl":null,"url":null,"abstract":"Planar double-gate field effect transistors with asymmetric (p++/n++) independent gates down to 55nm physical gate lengths are successfully fabricated. A fabrication concept, epi-before-bonding, is introduced and demonstrated to be highly successful in achieving ultra-thin and planar Si bodies. Various modes of operations are extensively analyzed and compared to 2D simulations. It is experimentally shown that specific off-current requirements can be fulfilled with conventional poly-Si gates.","PeriodicalId":116606,"journal":{"name":"2005 IEEE International SOI Conference Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2005.1563562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Planar double-gate field effect transistors with asymmetric (p++/n++) independent gates down to 55nm physical gate lengths are successfully fabricated. A fabrication concept, epi-before-bonding, is introduced and demonstrated to be highly successful in achieving ultra-thin and planar Si bodies. Various modes of operations are extensively analyzed and compared to 2D simulations. It is experimentally shown that specific off-current requirements can be fulfilled with conventional poly-Si gates.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
