Protection of SiC MOSFET from Negative Gate Voltage Spikes with a Low-Voltage GaN HEMT

Abstract

The false turn-on induced by the gate loop parasitic and Miller capacitance during the fast switching transient of SiC MOSFET leads to increased switching loss, circuit oscillation and even shoot-through. Using a negative OFF-state gate voltage $V_{\text{GS}-} \text{off}$ can effectively mitigate the false turn-on issue. However, this approach also raises the magnitude of negative gate voltage spikes that occur during the fall of $V_{\text{DS}}$, leading to unwanted negative gate overstress. In this work, a simple GaN-HEMT-based gate clamping circuit (GCC) is designed for SiC MOSFET negative gate voltage spike clamping. Thanks to the fast switching speed of GaN HEMT, GCC can clamp the negative spike effectively even at a high slew rate of $V_{\text{DS}}$ (120 V/ns), protecting the gate from overstress when negative $V_{\text{GS}-\text{off}}$ is applied to suppress false turn-on.