Floor layout planning method based on self-organization

Abstract

Floor layout to realize short accumulated distance of product and high throughput is required. Currently, however, it is very difficult and takes a very long time to optimize floor planning in a wafer process, because of complex process flow. In this paper we propose a new method of floor planning based on self-organization to solve these problems. We verify the validity of applying this method to semiconductor manufacturing. Self-organization method can generate a floor layout plan autonomously. In particular, potential field modeling method can describe simulation models in a simple way, because it controls all entities in the same method. The results of simulation indicate that the proposed method can provide the layout plan with short accumulated distance of product without requiring considerable labor and time.