{"title":"Design, implementation and comparison of three general-purpose neurons","authors":"S. Coric, I. Latinovic, A. Pavasovic","doi":"10.1109/MIEL.2002.1003329","DOIUrl":null,"url":null,"abstract":"FPGA hardware implementation of three neurons is described, and their performances compared, mainly in the domain of speed and complexity.","PeriodicalId":221518,"journal":{"name":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2002.1003329","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
FPGA hardware implementation of three neurons is described, and their performances compared, mainly in the domain of speed and complexity.
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