Gyujei Lee, H.-Y Son, J. Hong, Kwang-yoo Byun, D. Kwon
{"title":"Quantification of micropartial residual stress for mechanical characterization of TSV through nanoinstrumented indentation testing","authors":"Gyujei Lee, H.-Y Son, J. Hong, Kwang-yoo Byun, D. Kwon","doi":"10.1109/ECTC.2010.5490902","DOIUrl":null,"url":null,"abstract":"Most TSVs filled with plated copper offer many reliability problems. When subjected to thermal-cycled plating processes, the very large CTE (coefficient of thermal expansion) mismatch between the copper and the silicon/dielectric generates enormous interfacial thermal stress. In addition, the incoherency of differently grown copper grains plated under various processing conditions produces significant residual stress at grain boundaries that can be high enough to cause delamination or interfacial fracture. Many technologies have been developed for measuring residual stress, but they are too bulky to use at TSV microscales or yield averaged results inappropriate for the local assessment of TSV interfaces. Nanoinstrumented indentation testing, on the other hand, has many advantages in the micropartial characterization of residual stress using the load difference between samples with different residual stresses at the same depth. Here we introduce an algorithm to measure micropartial residual stress of TSV interfaces through nanoinstrumented indentation testing. To verify our measured outputs, we observed cross-sectional TSV morphologies for metallurgical analysis.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2010.5490902","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
Most TSVs filled with plated copper offer many reliability problems. When subjected to thermal-cycled plating processes, the very large CTE (coefficient of thermal expansion) mismatch between the copper and the silicon/dielectric generates enormous interfacial thermal stress. In addition, the incoherency of differently grown copper grains plated under various processing conditions produces significant residual stress at grain boundaries that can be high enough to cause delamination or interfacial fracture. Many technologies have been developed for measuring residual stress, but they are too bulky to use at TSV microscales or yield averaged results inappropriate for the local assessment of TSV interfaces. Nanoinstrumented indentation testing, on the other hand, has many advantages in the micropartial characterization of residual stress using the load difference between samples with different residual stresses at the same depth. Here we introduce an algorithm to measure micropartial residual stress of TSV interfaces through nanoinstrumented indentation testing. To verify our measured outputs, we observed cross-sectional TSV morphologies for metallurgical analysis.