{"title":"A Front-End Amplifier for Neural Signal Acquisition","authors":"Ruoyuan Qu, Wei Zhang, Qianqian Lv, Ming Tang","doi":"10.1109/CIRSYSSIM.2018.8525890","DOIUrl":null,"url":null,"abstract":"A structure of an operational amplifier for neural processing chip is presented in this paper. Due to the special application, noise and power consumption optimization method is introduced from structure level to device level. For structure level, the capacitance proportional circuit is carefully designed to achieve a closed-loop gain and band-pass filtering function at the same time. The adoption of Sub-threshold MOSFETs obtains low noise and high resistance in device level. Fabricated in SMIC 180nm CMOS process, the amplifier yielded a mid-band gain of 57dB and a −3dB bandwidth from 9.2Hz to 80k Hz and input referred noise of 3.06uV while power consumption of 144uW.","PeriodicalId":127121,"journal":{"name":"2018 IEEE 2nd International Conference on Circuits, System and Simulation (ICCSS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 2nd International Conference on Circuits, System and Simulation (ICCSS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIRSYSSIM.2018.8525890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A structure of an operational amplifier for neural processing chip is presented in this paper. Due to the special application, noise and power consumption optimization method is introduced from structure level to device level. For structure level, the capacitance proportional circuit is carefully designed to achieve a closed-loop gain and band-pass filtering function at the same time. The adoption of Sub-threshold MOSFETs obtains low noise and high resistance in device level. Fabricated in SMIC 180nm CMOS process, the amplifier yielded a mid-band gain of 57dB and a −3dB bandwidth from 9.2Hz to 80k Hz and input referred noise of 3.06uV while power consumption of 144uW.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
