High-Voltage Kilovolt Enhancement-Mode β-Ga2O3 Current-Aperture Vertical Electron Transistors with Recessed-Gate Design

Abstract

We demonstrate a comprehensive design and modeling of high-voltage kV-class enhancement-mode β-Ga2O3 current-aperture vertical electron transistors (CAVETs) with recessed gate using TCAD SILVACO simulation. The conventional device, single-step recessed gate device and two-step recessed gate device were investigated to explore their performance limit, where their electrical characteristics were compared. The breakdown voltage (BV) increased from 260 V in the conventional device without recessed gated to 3100 V in the device with recessed gate . Furthermore, the breakdown electric field was also increased from 1.4 MV/cm to 8 MV/cm when using the recessed gate structure with little impact on the device threshold voltages. The effects of recessed depth and width, and the distance between the two recessed steps on the device performance were studied in detail. This work provides valuable information for the development of high-performance high-voltage β-Ga2O3 CAVETs in next-generation power electronic applications.