Buried double bondwires for microwave hermetic packages

Sung-Jin Kim, Hai-Young Lee
{"title":"Buried double bondwires for microwave hermetic packages","authors":"Sung-Jin Kim, Hai-Young Lee","doi":"10.1109/EPEP.1997.634072","DOIUrl":null,"url":null,"abstract":"Double bondwires buried in a dielectric material is proposed for high frequency hermetic packages and characterized experimentally and theoretically up to 30 GHz. These buried bondwires made it possible to achieve 15 dB improvement of return loss at 20 GHz compared to conventional bondwires.","PeriodicalId":220951,"journal":{"name":"Electrical Performance of Electronic Packaging","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1997.634072","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

Double bondwires buried in a dielectric material is proposed for high frequency hermetic packages and characterized experimentally and theoretically up to 30 GHz. These buried bondwires made it possible to achieve 15 dB improvement of return loss at 20 GHz compared to conventional bondwires.
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微波密封包装用埋地双键线
提出了一种埋在介质材料中的双键合线用于高频密封封装,并在实验和理论上表征了其高达30 GHz的性能。与传统的结合线相比,这些埋入式结合线可以在20 GHz时实现15 dB的回波损耗改善。
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