H. Sato, K. Tsuneno, K. Aoyama, T. Nakamura, H. Kunitomo, H. Masuda
{"title":"A new hierarchical RSM for TCAD-based device design to predict CMOS development","authors":"H. Sato, K. Tsuneno, K. Aoyama, T. Nakamura, H. Kunitomo, H. Masuda","doi":"10.1109/ICMTS.1995.513991","DOIUrl":null,"url":null,"abstract":"A new methodology in simulation-based CMOS process designs has been proposed, using a hierarchical RSM (Response Surface Method) and efficient experimental calibrations. The new design methodology has been verified in a half-micron CMOS process/device development using the test structure, which results in reliable prediction of the threshold voltage (Vth) and drain current (Ids) within 0.01 V and 0.84% errors, respectively. This method has also reduced simulation works to about one half required by the conventional RSM. TCAD based RSM is applied for predicting quarter-micron CMOS development.","PeriodicalId":432935,"journal":{"name":"Proceedings International Conference on Microelectronic Test Structures","volume":"18 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1995.513991","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A new methodology in simulation-based CMOS process designs has been proposed, using a hierarchical RSM (Response Surface Method) and efficient experimental calibrations. The new design methodology has been verified in a half-micron CMOS process/device development using the test structure, which results in reliable prediction of the threshold voltage (Vth) and drain current (Ids) within 0.01 V and 0.84% errors, respectively. This method has also reduced simulation works to about one half required by the conventional RSM. TCAD based RSM is applied for predicting quarter-micron CMOS development.
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