Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

I-Cheng Lin, Chih-Yao Huang, Chuan-Jane Chao, M. Ker
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引用次数: 17

Abstract

Latchup failure induced by ESD protection circuits occurred in a high-voltage IC product. Latchup occurred anomalously at only several output pins. All output pins have nearly identical layouts except the side output pin has a N-well resistor of RC gate-coupled PMOS beside. It was later found this N-well resistor is the main cause of inducing latchup.
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高电压CMOS集成电路中片上ESD保护电路引起的异常闭锁失效
在高压集成电路产品中,发生了由ESD保护电路引起的闭锁失效。只有几个输出引脚出现了异常锁紧。所有输出引脚几乎都有相同的布局,除了侧面输出引脚旁边有一个RC栅极耦合PMOS的n孔电阻。后来发现这个n阱电阻是引起闭锁的主要原因。
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