Digital and RF integration in system-on-a-package (SOP)

V. Sundaram, Fuhan Liu, S. Dalmia, J. Hobbs, E. Matoglu, M. Davis, T. Nonaka, J. Laskar, Madhavan Swaminathan, George E. White, Rao Tummala
{"title":"Digital and RF integration in system-on-a-package (SOP)","authors":"V. Sundaram, Fuhan Liu, S. Dalmia, J. Hobbs, E. Matoglu, M. Davis, T. Nonaka, J. Laskar, Madhavan Swaminathan, George E. White, Rao Tummala","doi":"10.1109/ECTC.2002.1008164","DOIUrl":null,"url":null,"abstract":"The Packaging Research Center (PRC) is developing system-on-a-package (SOP) technology, as a complimentary alternative to SOC, as the fundamental building block for next generation convergent systems with computing, telecom and consumer capabilities with data and voice. Any systems of this nature have to provide not only high-speed digital, but also high bandwidth optical, analog, RF and perhaps MEMS functions. The SOP technology being pursued at PRC with embedded digital, optical and RF functions addresses this need, optimizing the IC and the package for functions, performance, cost, size and reliability. The PRC is developing this complimentary alternative to SOC using a three tier strategy consisting of fundamental research innovations, enabling technology developments and system-level testbeds. Individual digital, optical and RF testbeds have been developed to enable the integration of novel packaging technologies like embedded passive and optical components, high density global interconnections and wafer level flip-chip assembly. A phased system testbed is being evolved from these three testbeds to develop new SOP convergent system platforms for a digital/optical/RF system implementation. This paper summarizes the latest PRC accomplishments in the development of SOP baseline processes and system testbeds and updates the progress from basic research and technology integration to system testbeds for SOP.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2002.1008164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16

Abstract

The Packaging Research Center (PRC) is developing system-on-a-package (SOP) technology, as a complimentary alternative to SOC, as the fundamental building block for next generation convergent systems with computing, telecom and consumer capabilities with data and voice. Any systems of this nature have to provide not only high-speed digital, but also high bandwidth optical, analog, RF and perhaps MEMS functions. The SOP technology being pursued at PRC with embedded digital, optical and RF functions addresses this need, optimizing the IC and the package for functions, performance, cost, size and reliability. The PRC is developing this complimentary alternative to SOC using a three tier strategy consisting of fundamental research innovations, enabling technology developments and system-level testbeds. Individual digital, optical and RF testbeds have been developed to enable the integration of novel packaging technologies like embedded passive and optical components, high density global interconnections and wafer level flip-chip assembly. A phased system testbed is being evolved from these three testbeds to develop new SOP convergent system platforms for a digital/optical/RF system implementation. This paper summarizes the latest PRC accomplishments in the development of SOP baseline processes and system testbeds and updates the progress from basic research and technology integration to system testbeds for SOP.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
系统单包(SOP)中的数字和射频集成
封装研究中心(PRC)正在开发系统级封装(SOP)技术,作为SOC的补充替代方案,作为具有计算,电信和具有数据和语音的消费者功能的下一代融合系统的基本构建块。这种性质的任何系统不仅要提供高速数字,还要提供高带宽光学,模拟,射频和MEMS功能。PRC采用嵌入式数字、光学和射频功能的SOP技术解决了这一需求,优化了IC和封装的功能、性能、成本、尺寸和可靠性。中国正在使用由基础研究创新、使能技术开发和系统级测试平台组成的三层战略开发这种SOC的补充替代方案。已经开发了单独的数字,光学和射频测试平台,以实现嵌入式无源和光学元件,高密度全球互连和晶圆级倒装芯片组装等新型封装技术的集成。一个分阶段的系统测试平台正在从这三个测试平台发展,以开发新的SOP融合系统平台,用于数字/光学/射频系统的实施。本文综述了中国在SOP基线流程和系统试验台开发方面的最新成果,并介绍了SOP从基础研究和技术集成到系统试验台的进展。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Micropackaging using thin films as mechanical components Reaction kinetics of Pb-Sn and Sn-Ag solder balls with electroless Ni-P/Cu pad during reflow soldering in microelectronic packaging Low cost uncooled mini-DIL module for pump laser Transient three dimensional simulation of mold filling and wire sweep in an overmold BGA package A novel, wafer-scale technology for addressing process and cost obstacles associated with underfilling FCOB
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1