Reverse Current of Plasma Doped p+/n Ultra-Shallow Junction

H. Sauddin, H. Tamura, K. Okashita, Y. Sasaki, H. Ito, B. Mizuno, K. Kakushima, K. Tsutsui, H. Iwai
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引用次数: 4

Abstract

Rapid scaling in silicon CMOS devices has forced the junction depth requirement needed for S/D extensions of MOSFET to be as shallow as 10 nm in the next 45 nm technology node [1]. For this reason, the plasma doping method is considered to be promising compared to the conventional ion implantation, since it has significant advantages such as very high throughput and more compact in system hardware [2]-[6]. Formation of ultra-shallow p-type junction using boron is considerably difficult due to low energy requirement on doping and rapid diffusion of boron during thermal annealing that can increase junction depth. Very short time annealing such as flash lamp annealing (FLA) or spike rapid thermal annealing (RTA) is required to form such shallow junctions [7]-[ 10]. Fig. 1 is a plot of the R,-Xj relationship using the combination of the plasma doping and dopant activation process by FLA or spike RTA, which shows a successful formation of ultra-shallow junction [11][ 12]. However, the study on the leakage current across the ultra-shallow junction has been relatively limited. Since the impurity profile, the condition of amorphization, and the defect formation in the silicon wafers doped by the plasma doping are different from those by the conventional ion implantation, the characteristics ofthe residual defects after the activation annealing, to which the electrical characteristics of the junction is sensitive, might be different between the two.
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等离子体掺杂p+/n超浅结的反向电流
硅CMOS器件的快速缩放迫使MOSFET的S/D扩展所需的结深要求在下一个45纳米技术节点中达到10纳米[1]。因此,与传统的离子注入相比,等离子体掺杂方法被认为是有前途的,因为它具有非常高的通量和更紧凑的系统硬件等显著优势[2]-[6]。由于掺杂能量要求低,热退火过程中硼的快速扩散可以增加结深,因此用硼制备超浅p型结相当困难。形成这种浅结需要极短时间的退火,如闪光灯退火(FLA)或尖峰快速热退火(RTA)[7]-[10]。图1是结合等离子体掺杂和FLA或尖峰RTA激活掺杂过程的R,-Xj关系图,显示了超浅结的成功形成[11][12]。然而,对超浅结漏电流的研究相对有限。由于等离子体掺杂硅片的杂质分布、非晶化条件和缺陷形成与传统离子注入不同,因此活化退火后的残余缺陷特征可能会有所不同,而这对结的电学特性很敏感。
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