Recent Advancements in FPGA-based LSTM Accelerator

Abstract

In this paper, a review of execution of Long Short-Term Memory Accelerator on FPGA is presented. The paper starts with a brief overview on the significance of LSTM accelerators, historical background and general structure of LSTM accelerators. Then recent works in this area are highlighted. The research in this domain is focused on modifying the architecture of LSTM to overlap the computation of different stages in the network. This yields less power and higher performance as compared to the corresponding software implementation. The implementation on FPGA provides user with the ability to tradeoff resource utilization and speed of operation by adjusting the amount of parallelization for different operation such as vector multiplication and addition. This offers flexibility to adjust the computational load for different FPGA boards.