Improving path delay fault testability by path removal

Abstract

It has been shown previously, that paths which are internally fanout free and not nonrobustly testable with respect to at least one transition, can be removed from a circuit without changing its functional behavior. This transformation has been successfully applied in order to remove long false paths from a given circuit. In this work, we show how to apply the above transformation in order to improve delay testability. Experimental results demonstrate that large improvements in testability can be obtained at low hardware costs. In addition, the delay of the circuits is even reduced in most cases.