Modeling of Sneaky Hardware Trojan Using Spin-orbit Torque Assisted Magnetic Tunnel Junction for High Speed Digital Circuits

R. Kumar, Divyanshu Divyanshu, Danial Khan, S. Amara, Y. Massoud
{"title":"Modeling of Sneaky Hardware Trojan Using Spin-orbit Torque Assisted Magnetic Tunnel Junction for High Speed Digital Circuits","authors":"R. Kumar, Divyanshu Divyanshu, Danial Khan, S. Amara, Y. Massoud","doi":"10.1109/APCCAS55924.2022.10090353","DOIUrl":null,"url":null,"abstract":"This work explores spin-orbit torque (SOT) assisted magnetic tunnel junction (MTJ) as a potential candidate for designing sneaky hardware Trojan (HT). The type of payload targeted is IC malfunction using an externally triggered activation mechanism with an external magnetic field. To make it sneakier, we designed the Trojan to have sufficient tolerance to stray magnetic fields and thermal stability to ensure better-hidden operation for temperature-based tests during system-on-a-chip (SoC) flow. For creating a smaller Trojan, the energy barrier height's effect must be considered. Therefore, an appropriate optimization for SOT-assisted MTJ is required. This work thus considers the effect of process variation in key MTJ parameters by using Monte-Carlo (MC) simulations, and the effect of temperature sweep is utilized to determine the operational ability of the Trojan. We also conclude the Trojan optimization design by analysing its behaviour for high-speed IC operation by performing eye-diagram tests and transient analysis measurements for more practical applications. This work shows that a 5% reduction in MTJ key dimensions for Trojan operation has around 58.87% reduction in the critical magnetic field required for triggering with sufficient tolerance to process variation. Thus, this work contributes towards optimization of hardware Trojan for more sneaky operation.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS55924.2022.10090353","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This work explores spin-orbit torque (SOT) assisted magnetic tunnel junction (MTJ) as a potential candidate for designing sneaky hardware Trojan (HT). The type of payload targeted is IC malfunction using an externally triggered activation mechanism with an external magnetic field. To make it sneakier, we designed the Trojan to have sufficient tolerance to stray magnetic fields and thermal stability to ensure better-hidden operation for temperature-based tests during system-on-a-chip (SoC) flow. For creating a smaller Trojan, the energy barrier height's effect must be considered. Therefore, an appropriate optimization for SOT-assisted MTJ is required. This work thus considers the effect of process variation in key MTJ parameters by using Monte-Carlo (MC) simulations, and the effect of temperature sweep is utilized to determine the operational ability of the Trojan. We also conclude the Trojan optimization design by analysing its behaviour for high-speed IC operation by performing eye-diagram tests and transient analysis measurements for more practical applications. This work shows that a 5% reduction in MTJ key dimensions for Trojan operation has around 58.87% reduction in the critical magnetic field required for triggering with sufficient tolerance to process variation. Thus, this work contributes towards optimization of hardware Trojan for more sneaky operation.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于自旋轨道转矩辅助磁隧道结的高速数字电路隐性硬件木马建模
本研究探讨了自旋轨道转矩(SOT)辅助磁隧道结(MTJ)作为设计隐性硬件木马(HT)的潜在候选器件。目标载荷类型是使用带有外部磁场的外部触发激活机制的IC故障。为了使其更加轻便,我们设计了特洛伊木马,使其具有足够的杂散磁场耐受性和热稳定性,以确保在片上系统(SoC)流程中更好地隐藏基于温度的测试。为了创建一个较小的特洛伊,必须考虑能量势垒高度的影响。因此,需要对sot辅助MTJ进行适当的优化。因此,本工作通过蒙特卡罗(MC)模拟考虑了工艺变化对关键MTJ参数的影响,并利用温度扫描的影响来确定木马的操作能力。通过眼图测试和瞬态分析测量,分析了特洛伊木马在高速IC运行中的行为,得出了特洛伊木马优化设计的结论。这项工作表明,特洛伊木马操作的MTJ关键尺寸减少5%,触发所需的临界磁场减少约58.87%,对工艺变化有足够的容忍。因此,这项工作有助于硬件木马的优化,以实现更隐蔽的操作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout An Eigen-decomposition Free Method for Computing Graph Fourier Transform Centrality A 60-GHz CMOS Balanced Power Amplifier with Miniaturized Quadrature Hybrids Achieving 19.0-dBm Output Power and 24.4% Peak PAE A Vector Pair Based DWA Algorithm for Linearity Enhancement of CDACs in the NS-SAR ADC Optimal Evasive Path Planning with Velocity Constraint
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1