{"title":"A nonenumerative ATPG for functionally sensitizable path delay faults","authors":"D. Karayiannis, S. Tragoudas","doi":"10.1109/VTEST.1998.670908","DOIUrl":null,"url":null,"abstract":"This paper presents a test pattern generator for path delay faults which generates a polynomial number of test patterns that target a large number of functionally sensitizable faults. The number of these faults may be exponential to the input site. Experimental results are presented on the ISCAS'85 benchmarks.","PeriodicalId":128521,"journal":{"name":"Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1998.670908","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a test pattern generator for path delay faults which generates a polynomial number of test patterns that target a large number of functionally sensitizable faults. The number of these faults may be exponential to the input site. Experimental results are presented on the ISCAS'85 benchmarks.