R. Cellier, G. Pillonnet, N. Abouchi, R. M'Rad, A. Nagari
{"title":"Analysis and design of an analog control loop for digital input class D amplifiers","authors":"R. Cellier, G. Pillonnet, N. Abouchi, R. M'Rad, A. Nagari","doi":"10.1109/ICECS.2011.6122225","DOIUrl":null,"url":null,"abstract":"Analog input Class D Amplifiers are widely used in battery powered systems such as mobile phones to achieve high efficiency but it suffers from a complex DAC to convert the digital audio signal into an analog one. To increase the playback time, this paper presents digital input class D amplifiers using digital modulation. The proposed Class D amplifier is also controlled using an analog loop to achieve a good power supply immunity and low harmonic distortion. Usual AC analysis of this loop cannot be done due to its switching behavior. Very long transient simulation was the only solution to predict the dynamics performances of the control. To overcome this issue, the presented work includes a modeling method in order to study faster the control performances. The proposed modeling is then used to increase the audio quality reproduction of our digital input Class D amplifier. The complete audio path is implemented in CMOS 130nm process and characterized in order to validate the architecture, the modeling method and the integrated design.","PeriodicalId":251525,"journal":{"name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2011.6122225","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Analog input Class D Amplifiers are widely used in battery powered systems such as mobile phones to achieve high efficiency but it suffers from a complex DAC to convert the digital audio signal into an analog one. To increase the playback time, this paper presents digital input class D amplifiers using digital modulation. The proposed Class D amplifier is also controlled using an analog loop to achieve a good power supply immunity and low harmonic distortion. Usual AC analysis of this loop cannot be done due to its switching behavior. Very long transient simulation was the only solution to predict the dynamics performances of the control. To overcome this issue, the presented work includes a modeling method in order to study faster the control performances. The proposed modeling is then used to increase the audio quality reproduction of our digital input Class D amplifier. The complete audio path is implemented in CMOS 130nm process and characterized in order to validate the architecture, the modeling method and the integrated design.