{"title":"Pass transistor logic ALU design","authors":"R. Wagiran, A.B. Chong, I. Ahmad","doi":"10.1109/SMELEC.2002.1217869","DOIUrl":null,"url":null,"abstract":"The work presented here shows the comparison of IC design using Tanner EDA (arithmetic logic unit) of 74382 IC using static logic gate and pass logic gate. Tanner tools are used for the schematic and layout simulation as well as the schematic versus layout comparison. The simulation technology used is Mosis 2.0 /spl mu/m.","PeriodicalId":211819,"journal":{"name":"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICONIP '02. Proceedings of the 9th International Conference on Neural Information Processing. Computational Intelligence for the E-Age (IEEE Cat. No.02EX575)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2002.1217869","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The work presented here shows the comparison of IC design using Tanner EDA (arithmetic logic unit) of 74382 IC using static logic gate and pass logic gate. Tanner tools are used for the schematic and layout simulation as well as the schematic versus layout comparison. The simulation technology used is Mosis 2.0 /spl mu/m.
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