TCAD and SPICE modeling help solve ESD protection issues in analog CMOS technology

D. Trémouilles, G. Bertrand, M. Bafleur, Felix Beaudoin, P. Perdu, N. Guitard, L. Lescouzères
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引用次数: 15

Abstract

The number of circuit design iterations due to electrostatic discharge (ESD) failures increases with the complexity of VLSI technologies and the shrinkage of their dimensions. In this paper, we show how TCAD and ESD SPICE modeling can be used to solve ESD protection issues in an analog CMOS technology.
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TCAD和SPICE建模有助于解决模拟CMOS技术中的ESD保护问题
随着超大规模集成电路技术的复杂性和尺寸的缩小,静电放电(ESD)失效导致的电路设计迭代次数也在增加。在本文中,我们展示了如何使用TCAD和ESD SPICE建模来解决模拟CMOS技术中的ESD保护问题。
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