Soft error immune LT GaAs ICs

T. Weatherford, P. Marshall, C. Dale, D. McMorrow, A. Peczalski, S. Baier, M. Carts, M. Twigg
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引用次数: 3

Abstract

Implementation of a low temperature grown GaAs (LT GaAs) buffer layer beneath the complementary heterostructure field effect transistor (CHFET) GaAs integrated circuit (IC) process is shown to eliminate soft error susceptibility. With soft errors reduced by over 8 orders of magnitude, the CHFET digital GaAs technology can provide the highest overall radiation immunity for any GaAs or silicon FET-based technology.
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软误差免疫LT GaAs集成电路
在互补异质结构场效应晶体管(CHFET) GaAs集成电路(IC)工艺下实现低温生长GaAs (LT GaAs)缓冲层可以消除软误差敏感性。由于软误差降低了8个数量级以上,CHFET数字GaAs技术可以为任何GaAs或硅fet技术提供最高的整体抗辐射能力。
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Ion-implanted GaAs JFETs with f/sub t/>45 GHz for low-power electronics W-band InGaAs/InP PIN diode monolithic integrated switches A 500 MHz complementary gallium arsenide clock multiplier A 2 GHz 12-bit digital-to-analog converter for direct digital synthesis applications Breakdown effects on the performance and reliability of power MESFETs
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