T. Johansen, N. Weimann, R. Doerner, Maruf Hossain, V. Krozer, W. Heinrich
{"title":"EM simulation assisted parameter extraction for the modeling of transferred-substrate InP HBTs","authors":"T. Johansen, N. Weimann, R. Doerner, Maruf Hossain, V. Krozer, W. Heinrich","doi":"10.23919/EUMIC.2017.8230704","DOIUrl":null,"url":null,"abstract":"In this paper an electromagnetic (EM) simulation assisted parameters extraction procedure is demonstrated for accurate modeling of down-scaled transferred-substrate InP HBTs. The external parasitic network associated with via transitions and device electrodes is carefully extracted from calibrated 3D EM simulations up to 325 GHz. Following an on-wafer multi-line Through-Reflect-Line (TRL) calibration procedure, the external parasitic network is de-embedded from the transistor measurements and the active device parameters are extracted in a reliable way. The small-signal model structure augmented with the distributed parasitic network is verified against measured S-parameters up to 110 GHz.","PeriodicalId":120932,"journal":{"name":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2017.8230704","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper an electromagnetic (EM) simulation assisted parameters extraction procedure is demonstrated for accurate modeling of down-scaled transferred-substrate InP HBTs. The external parasitic network associated with via transitions and device electrodes is carefully extracted from calibrated 3D EM simulations up to 325 GHz. Following an on-wafer multi-line Through-Reflect-Line (TRL) calibration procedure, the external parasitic network is de-embedded from the transistor measurements and the active device parameters are extracted in a reliable way. The small-signal model structure augmented with the distributed parasitic network is verified against measured S-parameters up to 110 GHz.