{"title":"A Wideband Low-Noise Inductor less CMOS Active Mixer With Improved Linearity","authors":"Hesam Abbasi, M. Yavari","doi":"10.1109/IICM55040.2021.9730140","DOIUrl":null,"url":null,"abstract":"This paper presents a CMOS active inductorless downconversion mixer for zero-IF receivers. The structure implements the 1M2 injection and derivative superposition techniques to improve the linearity. Nonlinear currents are generated by auxiliary transistors and they are injected to the nonlinear currents of the input transistors into increase the second-order input intercept point (IIP2) and third-order input intercept point (IIP3) values of the mixer. Common-Gate structure is used in the RF input stage. To reduce the noise contribution of the input transistors, a noise cancellation technique is employed. The proposed mixer is designed in 65 nm CMOS technology and simulated using Spectre-RF in Cadence. The simulation results show 8.34 dB, 6.81 dB, and 4.15 dB on average improvement for IIP2, IIP3, and NF, respectively, in the 0.8-5 GHz input frequency range. The proposed mixer consumes 13.95 mW power which is 64.1% more than the conventional CMOS active mixer.","PeriodicalId":299499,"journal":{"name":"2021 Iranian International Conference on Microelectronics (IICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Iranian International Conference on Microelectronics (IICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IICM55040.2021.9730140","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a CMOS active inductorless downconversion mixer for zero-IF receivers. The structure implements the 1M2 injection and derivative superposition techniques to improve the linearity. Nonlinear currents are generated by auxiliary transistors and they are injected to the nonlinear currents of the input transistors into increase the second-order input intercept point (IIP2) and third-order input intercept point (IIP3) values of the mixer. Common-Gate structure is used in the RF input stage. To reduce the noise contribution of the input transistors, a noise cancellation technique is employed. The proposed mixer is designed in 65 nm CMOS technology and simulated using Spectre-RF in Cadence. The simulation results show 8.34 dB, 6.81 dB, and 4.15 dB on average improvement for IIP2, IIP3, and NF, respectively, in the 0.8-5 GHz input frequency range. The proposed mixer consumes 13.95 mW power which is 64.1% more than the conventional CMOS active mixer.