Channel structure design, fabrication and carrier transport properties of strained-Si/SiGe-on-insulator (strained-SOI) MOSFETs

S. Takagi, T. Mizuno, T. Tezuka, N. Sugiyama, T. Numata, K. Usuda, Y. Moriyama, S. Nakaharai, J. Koga, A. Tanabe, N. Hirashita, T. Maeda
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引用次数: 91

Abstract

This paper reviews the current critical issues regarding the device design of strained-Si MOSFETs and demonstrates that strained-Si-on-insulator (strained-SOI) structures can effectively solve these problems. The advantages, characteristics and challenges of strained-SOI CMOS technology are presented, on the basis of our recent results. Furthermore, a future possible direction of channel engineering using strained-Si/SiGe structures, into the deep sub-100 nm regime, is addressed.
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应变si /SiGe-on-insulator(应变soi) mosfet的沟道结构设计、制造及载流子输运特性
本文综述了当前应变si mosfet器件设计中的关键问题,并论证了应变si -on-insulator(应变soi)结构可以有效地解决这些问题。基于我们最近的研究成果,介绍了应变soi CMOS技术的优势、特点和挑战。此外,还讨论了使用应变si /SiGe结构的通道工程的未来可能方向,进入深度低于100 nm的区域。
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