A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control

M. Solé, A. Bischof, Lorenzo Bergamini, P. Dallemagne, S. Emery, Komail M. H. Badami, Jiang Deng, T. Mavrogordatos, E. Azarkhish, Loïc Zahnd, C. Cosentino, M. Augustyniak, Y. Zha
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引用次数: 2

Abstract

This work introduces a highly integrated and a power-efficient SoC with 20 EMG sensing channels, a 32b RISC core with a host of peripherals and a companion RF transceiver chip in the 55 nm CMOS technology to enable real-time Osseo-integrated prosthesis control and is aimed at recovery of hand function after amputation. The EMG processing channels include temperature compensated pseudo-resistors in highly programmable gain stages, a 4th order Chebyshev low-pass filter with enhanced linearity and 12b SAR ADC operating in the programmable range of 1.2MS/s to 125kS/s for multichannel EMG signal digitization. The digital back-end includes an EMG pre-processing accelerator and a 32b RISC processor that optimizes the power-consumption of the companion RF transceiver to improve the power-efficiency of the the prosthesis control system.
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20通道EMG SoC,集成32b RISC内核,用于实时无线假肢控制
这项工作介绍了一个高集成和低功耗的SoC,具有20个肌电信号传感通道,一个32b的RISC内核和一系列外围设备,以及一个55纳米CMOS技术的射频收发器芯片,以实现实时骨集成假肢控制,旨在截肢后手部功能的恢复。EMG处理通道包括高度可编程增益级的温度补偿伪电阻,增强线性度的4阶切比雪夫低通滤波器和12b SAR ADC,工作在1.2MS/s至125kS/s的可编程范围内,用于多通道EMG信号数字化。数字后端包括一个肌电信号预处理加速器和一个32b RISC处理器,该处理器优化了配套射频收发器的功耗,以提高假肢控制系统的功率效率。
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