An energy-scalable accelerator for blind image deblurring

Priyanka Raina, M. Tikekar, A. Chandrakasan
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引用次数: 1

Abstract

Camera shake is the leading cause of blur in cell-phone camera images. Removing blur requires deconvolving the blurred image with a kernel which is typically unknown and needs to be estimated from the blurred image. This kernel estimation is computationally intensive and takes several minutes on a CPU which makes it unsuitable for mobile devices. This work presents the first hardware accelerator for kernel estimation for image deblurring applications. Our approach, using a multi-resolution IRLS deconvolution engine with DFT based matrix multiplication, a high-throughput image correlator and a high-speed selective update based gradient projection solver, achieves a 78× reduction in kernel estimation runtime, and a 56× reduction in total deblurring time for a 1920×1080 image enabling quick feedback to the user. Configurability in kernel size and number of iterations gives up to 10× energy scalability, allowing the system to trade-off runtime with image quality. The test chip, fabricated in 40 nm CMOS, consumes 105 mJ for kernel estimation running at 83 MHz and 0.9 V, making it suitable for integration into mobile devices.
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用于盲图像去模糊的能量可伸缩加速器
相机抖动是导致手机相机图像模糊的主要原因。去除模糊需要用一个通常未知的核对模糊图像进行反卷积,并且需要从模糊图像中进行估计。这种内核估计是计算密集型的,在CPU上需要几分钟,这使得它不适合移动设备。这项工作提出了第一个用于图像去模糊应用的核估计硬件加速器。我们的方法使用基于DFT的矩阵乘法的多分辨率IRLS反卷积引擎,高通量图像相关器和基于高速选择性更新的梯度投影求解器,实现了内核估计运行时间减少78倍,1920×1080图像的总去模糊时间减少56倍,从而能够快速反馈给用户。内核大小和迭代次数的可配置性提供了高达10倍的能量可伸缩性,允许系统在运行时和图像质量之间进行权衡。该测试芯片采用40 nm CMOS工艺,在83 MHz和0.9 V下运行时,内核估计功耗为105 mJ,适合集成到移动设备中。
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