High transmission performance integrated antennas on SOI substrate for VLSI wireless interconnects

Abstract

Alternative interconnect systems were recently proposed in order to overcome the problems of time delay, surface, and power consumption related to global traditional ones. The feasibility of wireless intra chip interconnects is studied, by focusing on system transmission properties and parasitic effects between integrated antennas and nearby interconnects. Technological processes were considered in order to deduce innovative design concepts that combine improved transmitted power and reduced interferences between antenna and nearby components on a SOI substrate using CMOS 120 nm technology. As a result, it is shown that moving away locally surrounding metallization greatly improves transmission and that crosstalk effects are of the same order with those of conventional interconnect systems. Wireless interconnect performances and compatibility with standard BEOL are demonstrated.