SiGe:C BiCMOS technology with 3.6 ps gate delay

H. Rucker, B. Heinemann, R. Barth, D. Bolze, J. Drews, U. Haak, W. Hoppner, D. Knoll, K. Kopke, S. Marschmeyer, H. Richter, P. Schley, D. Schmidt, R. Scholz, B. Tillack, W. Winkler, H. Wulf, Y. Yamamoto
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引用次数: 53

Abstract

A high-speed SiGe:C HBT technology is presented that combines a new extrinsic base construction with a low-resistance collector design to simultaneously minimize base and collector resistances and base-collector capacitance. A ring oscillator delay of 3.6 ps per stage was achieved. To our knowledge, this is the shortest gate delay reported to date for a SiGe technology. The HBTs demonstrate an f/sub T/ of 190 GHz, an f/sub max/ of 243 GHz, and a BV/sub CEO/ of 1.9 V at an drawn emitter size of 0.175/spl times/0.84 /spl mu/m/sup 2/. The high-speed HBT module has been integrated in a 0.25 /spl mu/m CMOS platform.
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SiGe:C BiCMOS技术,具有3.6 ps栅极延迟
提出了一种高速SiGe:C HBT技术,该技术结合了一种新的外部基极结构和低电阻集电极设计,同时最小化基极和集电极电阻以及基极集电极电容。实现了每级3.6 ps的环形振荡器延迟。据我们所知,这是迄今为止SiGe技术中最短的门延迟。当发射极尺寸为0.175/spl times/0.84 /spl mu/m/sup 2/时,HBTs的f/sub T/为190 GHz, f/sub max/为243 GHz, BV/sub CEO/为1.9 V。高速HBT模块已集成在0.25 /spl mu/m CMOS平台上。
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