Muhammad Basim, Danial Khan, Q. Ain, Khuram Shehzad, Muhammad Asif, Kangyoon Lee
{"title":"A High Efficient RF-DC Converter for RF Energy Harvesting Applications","authors":"Muhammad Basim, Danial Khan, Q. Ain, Khuram Shehzad, Muhammad Asif, Kangyoon Lee","doi":"10.1109/ISOCC50952.2020.9333117","DOIUrl":null,"url":null,"abstract":"In this paper, a self-threshold voltage compensated RF-DC converter operating at 902 MHz is proposed for RF energy harvesting applications. A voltage divider chain consisting of auxiliary transistors is used to provide optimum compensation voltage to the gates of rectifying devices in the main rectification chain. The proposed RF-DC converter is designed and simulated in 180 nm CMOS technology. The simulation results show that the proposed circuit achieves peak power conversion efficiency (PCE) of 40% at -12 dBm input power across 1 MΩ load resistance. The proposed scheme achieves a sensitivity of -20 dBm for 1 MΩ and produces 1 V output voltage.","PeriodicalId":270577,"journal":{"name":"2020 International SoC Design Conference (ISOCC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC50952.2020.9333117","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, a self-threshold voltage compensated RF-DC converter operating at 902 MHz is proposed for RF energy harvesting applications. A voltage divider chain consisting of auxiliary transistors is used to provide optimum compensation voltage to the gates of rectifying devices in the main rectification chain. The proposed RF-DC converter is designed and simulated in 180 nm CMOS technology. The simulation results show that the proposed circuit achieves peak power conversion efficiency (PCE) of 40% at -12 dBm input power across 1 MΩ load resistance. The proposed scheme achieves a sensitivity of -20 dBm for 1 MΩ and produces 1 V output voltage.