Simulating the Fabrication of Nb/Al-O/Nb Josephson Junction for Superconductive Electronics Application

Abstract

Josephson junction devices enable computation of binary data by switching between superconductive and resistive states. The switching is triggered by a current flowing through the junction below or above the critical limit $(I_{c})$, which is sensitive to the physical features of the junction. Modeling the variation in the physical properties of these tunnel junctions due to processing conditions is crucial to understanding the variation in $I_{c}$ across the chip and simulating the electrical characteristics of the device. The aim of this research is to model the steps involved in the fabrication of Nb/Al-O/Nb Josephson Junction for large scale integrated superconductive circuits, which consists of mainly: (i) sputter deposition of Al on top of the Nb base electrode (ii) oxidation of the Al layer to form Al-O tunnel barrier (~1nm] and (iii) anodization of the junction. Developing a process TCAD tool by implementing the fabrication steps from the base layer will ultimately complement device simulation and offer useful insights for optimization.