A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits

Yiorgos I. Bontzios, M. Dimopoulos, A. Hatzopoulos
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引用次数: 1

Abstract

A memetic algorithm for computing the capacitance coupling in Very Large Scale Integrated (VLSI) circuits is presented in this work. The method is based on an approximate extended version of the method of images, is general and applicable to an arbitrary geometry and configuration of conductors. Simulation results are presented for several practical case studies where our method is compared with a commercial tool employing the Finite Element Method (FEM). The capacitance value computed by the proposed method is shown to be in close agreement with the value obtained by the commercial tool with the average difference kept below 3%, thus revealing the efficiency of the proposed scheme.
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一种计算多导体VLSI电路三维电容的模因算法
本文提出了一种计算超大规模集成电路中电容耦合的模因算法。该方法基于图像法的近似扩展版本,具有通用性,适用于导体的任意几何形状和配置。本文给出了几个实际案例的仿真结果,其中我们的方法与采用有限元法(FEM)的商业工具进行了比较。用该方法计算的电容值与商用工具计算的电容值接近,平均差值保持在3%以下,表明了该方法的有效性。
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