Characterization Methodology and Physical Compact Modeling of in-Wafer Global and Local Variability

Abstract

A unified, industrially compatible methodology to characterize and model in-wafer variability at different spatial scales, with addressable array test structures is proposed. Using a physics-based compact model, a single statistical model for both local and global variability is developed for the first time. The proposed method and model are validated using 28 nm FD-SOI devices and the dependence of dominant sources of variability on bias and device geometry is evaluated.