Alessandro Franceschin, P. Andreani, F. Padovan, M. Bassi, R. Nonis, A. Bevilacqua
{"title":"A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion","authors":"Alessandro Franceschin, P. Andreani, F. Padovan, M. Bassi, R. Nonis, A. Bevilacqua","doi":"10.1109/ESSCIRC.2019.8902813","DOIUrl":null,"url":null,"abstract":"Class-C operation is leveraged to implement a K-band CMOS VCO where the upconversion of the 1/f noise from the core transistors is robustly contained at a minimal level. Implemented in a bulk 28 nm CMOS technology, the VCO shows a phase noise as low as -108.5 dBc/Hz at 1 MHz offset (-83 dBc/Hz at 100 kHz offset) from the 19.5 GHz carrier, while consuming 14.4 mW and featuring a 12% tuning range.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902813","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Class-C operation is leveraged to implement a K-band CMOS VCO where the upconversion of the 1/f noise from the core transistors is robustly contained at a minimal level. Implemented in a bulk 28 nm CMOS technology, the VCO shows a phase noise as low as -108.5 dBc/Hz at 1 MHz offset (-83 dBc/Hz at 100 kHz offset) from the 19.5 GHz carrier, while consuming 14.4 mW and featuring a 12% tuning range.