Study and implementation of a high step-up voltage DC-DC converter using coupled-inductor and cascode techniques

2016 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2016-03-20 DOI:10.1109/APEC.2016.7468128

T. Liang, Yung-Ting Huang, Jian-Hsing Lee, Lo Pang-Yen Ting

引用次数: 8

Abstract

A novel high efficiency high step-up DC-DC converter is proposed in this paper. The proposed converter can achieve high voltage ratio with appropriate duty cycle by using the coupled-inductor and cascode technique. In order to achieve high efficiency, a capacitor is used to recycle the leakage energy of the coupled-inductor and reduce the voltage stress on the switch. Therefore, the low-voltage rating MOSFET with low conduction resistance can be used. The operational principles and steady-state analysis of the proposed converter are discussed in detail. Finally, a prototype circuit with input voltage 24 V, output voltage 200 V and output power 250 W is implemented to verify the performances of the proposed converter. The experimental results reveals that the highest efficiency of the proposed converter is 94.6%, the full load efficiency is 92.3%, and the 10% load efficiency is 93.8%.

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利用耦合电感和级联编码技术研究和实现高升压DC-DC变换器

本文提出了一种新型高效高升压DC-DC变换器。该变换器采用电感耦合和级联编码技术，可以在适当的占空比下实现高电压比。为了实现高效率，采用电容回收耦合电感的漏能，减小开关上的电压应力。因此，可以使用具有低导通电阻的低压额定MOSFET。详细讨论了该变换器的工作原理和稳态分析。最后，设计了一个输入电压为24 V、输出电压为200 V、输出功率为250 W的原型电路，验证了该变换器的性能。实验结果表明，该变换器的最高效率为94.6%，满载效率为92.3%，10%负载效率为93.8%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2016 IEEE Applied Power Electronics Conference and Exposition (APEC)

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