Die to Wafer Hybrid Bonding: Multi-Die Stacking with Tsv Integration

Abstract

The Direct Bond Interconnect (DBI® Ultra) technology is a low temperature die to wafer (D2W) and die to die (D2D) hybrid bonding technology that solves many challenges with pitch scaling in advanced packaging. The ability to scale to < 1μm pitch while maintaining throughput comparable to the mass reflow flip chip process and providing improved reliability performance makes this platform technology attractive for the next generation packaging in the semiconductor industry. Two application areas which will benefit significantly in the migration from Cu μbump or Cu pillar to an all-Cu interconnect are high bandwidth memory (HBM) and compute intensive applications in 2.5D and 3D integrated solutions. A critical enabler of the D2W hybrid bonding technology in high volume manufacturing (HVM) is the availability of suitable pick and place bonders. The D2W hybrid bonding task is very similar to flip chip but require enhanced cleanliness environments with the bonder to perform ultra clean bonding. Currently, high alignment accuracy HVM bonders such as the Besi Chameo 8800 achieve approximately 3 μmalignment accuracy without sacrificing throughput and offer cleanroom environmental kits. These bonders accommodate device interconnect pitches of approximately 30 μmor larger. We target the first D2W bonding adoption in the sub-40 μmpitch range using existing flip chip bonders. Ziptronix first demonstrated the D2W hybrid bonding in 2003. Over the last five years Xperi has been systemically addressing critical challenges to bring the hybrid bonding technology for D2W applications to a manufacturing readiness. We present a review of the progress in this paper. Recently we have fabricated a test vehicle with TSVs similar to a HBM DRAM footprint to build 4-die stacks to demonstrate stacking and TSV intergration with the technology. The die is 8mm x12mm and 50 μmthick. TSV arrays include areas with up to 9480 TSV s in each die with a diameter of 5 μmon a pitch of35 μmThe fabrication of the hybrid bonding interface represents a significant simplification compared to the solder micro-bump technology. The Cu-Cu interconnectwas formed at 200°C. We share the assembly results of the 4 die stacks with TSV s in this paper.