A 6.5 nA Static Self-Calibrating Programmable Voltage Reference for Smart SoCs

Michele Caselli, E. Tiurin, S. Stanzione, A. Boni
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引用次数: 3

Abstract

This paper presents a novel architecture of a self-calibrating programmable voltage reference with nanoampere current consumption. The output voltage is generated by a programmable impedance matrix, based on MOS transistors and resistors, and periodically calibrated with a duty-cycled bandgap. In application domains where the temperature exhibits a low rate-of-change, an average current consumption of 6.5 nA is achieved, largely outperforming all the previously reported switched-capacitor or floating-gate architectures. Implemented in 55-nm CMOS technology, the reference exhibits a 0.4-to-2.5-V output voltage range, over the −20 to +80°C temperature range.
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一种用于智能soc的6.5 nA静态自校准可编程电压基准
本文提出了一种具有纳安培电流消耗的自校准可编程电压基准的新结构。输出电压由基于MOS晶体管和电阻的可编程阻抗矩阵产生,并定期使用占空比带隙进行校准。在温度变化率较低的应用领域,平均电流消耗为6.5 nA,大大优于之前报道的所有开关电容器或浮栅架构。该基准采用55纳米CMOS技术,在−20至+80°C的温度范围内,输出电压范围为0.4至2.5 v。
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