Qiming Shao, Can Zhao, Can Wu, Jinyu Zhang, Li Zhang, Zhiping Yu
{"title":"Compact model and projection of silicon nanowire tunneling transistors (NW-tFETs)","authors":"Qiming Shao, Can Zhao, Can Wu, Jinyu Zhang, Li Zhang, Zhiping Yu","doi":"10.1109/EDSSC.2013.6628137","DOIUrl":null,"url":null,"abstract":"We present in this paper a basic compact model incorporating several key physical mechanisms in nanowire tunneling field-effect transistors (NW-tFETs), such as non-constant subthreshold swing (SS), definition of an on voltage, ballistic transport for carriers in the channel, and quantum capacitance limit (QCL). Using experimental data from [1], the validity of this model is verified. Further, to project the performance of ultra-scaled silicon NW-tFETs, we compare the state-of-the-art gate-all-around (GAA) NW MOSFETs [2] with modeling results for the same NW diameter and EOT (effective oxide thickness). It is concluded that ultra-scaled NW-tFETs can achieve high performance with low subthreshold swing (SS) and nearly the same on current as in MOSFETs.","PeriodicalId":333267,"journal":{"name":"2013 IEEE International Conference of Electron Devices and Solid-state Circuits","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2013-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Conference of Electron Devices and Solid-state Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2013.6628137","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
We present in this paper a basic compact model incorporating several key physical mechanisms in nanowire tunneling field-effect transistors (NW-tFETs), such as non-constant subthreshold swing (SS), definition of an on voltage, ballistic transport for carriers in the channel, and quantum capacitance limit (QCL). Using experimental data from [1], the validity of this model is verified. Further, to project the performance of ultra-scaled silicon NW-tFETs, we compare the state-of-the-art gate-all-around (GAA) NW MOSFETs [2] with modeling results for the same NW diameter and EOT (effective oxide thickness). It is concluded that ultra-scaled NW-tFETs can achieve high performance with low subthreshold swing (SS) and nearly the same on current as in MOSFETs.