A 140 GHz MIMO Transceiver in 45 nm SOI CMOS

Abstract

This paper demonstrates a 140 GHz QPSK transceiver, designed as part of a 4-channel MIMO (multi input multi output) system using 45 nm CMOS SOI technology. A direct conversion architecture is implemented. In the receiver, low noise amplifier (LNA) is followed by a passive double balanced down conversion mixer and baseband amplifier; in the transmitter, an active Gilbert cell IQ modulator is followed by a driver amplifier. The 140 GHz local oscillator (LO) is generated by a $\times 9$ multiplier. The measured receiver conversion gain is 18 dB with a 12 GHz 3-dB bandwidth; a narrowband 145 GHz gain notch, unfortunately, limits the usable bandwidth. 3-dB modulation bandwidth of the transmitter is 6–8 GHz. Total power consumption of the 4-channel receiver is 495 mW from a 1 V supply. The 4-channel transmitter consumes 463 mW power from a 1 V supply. We show preliminary single-channel link measurements at an instrument-limited 800 Mb/s data rate.